• DocumentCode
    2545574
  • Title

    A Run-Time Memory Protection Methodology

  • Author

    Seshua, Udaya ; Bussa, Nagaraju ; Vermeulen, Bart

  • Author_Institution
    NXP Semicond., Bangalore
  • fYear
    2007
  • fDate
    23-26 Jan. 2007
  • Firstpage
    498
  • Lastpage
    503
  • Abstract
    In this paper we present a novel methodology to help debug memory corruption errors during application debug. In this methodology an optimal balance between hardware and software instrumentation is chosen to check at run-time all memory accesses made by an application. To achieve this balance a set of benchmark applications is first analyzed to determine their memory access patterns. The analysis results are used to make our approach low-cost both from a software performance penalty and a hardware area point-of-view. Experimental results show that our innovative approach typically requires less than 2% of a CPU in silicon area for a less than 1% run-time performance overhead. Our method is both low-cost and applicable to high performance microprocessors as well as time-constrained embedded systems.
  • Keywords
    embedded systems; hardware-software codesign; system recovery; benchmark applications; debug; memory access patterns; memory corruption errors; run time memory protection; Application software; Hardware; Instruments; Microprocessors; Pattern analysis; Performance analysis; Protection; Runtime; Silicon; Software performance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
  • Conference_Location
    Yokohama
  • Print_ISBN
    1-4244-0629-3
  • Electronic_ISBN
    1-4244-0630-7
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2007.358035
  • Filename
    4196081