DocumentCode
2545954
Title
A fixed-point multimedia coprocessor with 50Mvertices/s programmable SIMD vertex shader for mobile applications
Author
Sohn, Ju-Ho ; Woo, Jeong-Ho ; Woo, Ramchan ; Yoo, Hoi-Jun
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
fYear
2005
fDate
12-16 Sept. 2005
Firstpage
207
Lastpage
210
Abstract
A fixed-point multimedia coprocessor is designed and integrated into an ARM-10 based mobile graphics processor for portable 2D and 3D multimedia applications. The user-programmable SIMD vertex shader with ARM-10 co-processor architecture realizes advanced 3D graphics algorithms and various multimedia functions. Different from conventional ARM coprocessor architecture, the multimedia coprocessor implements dual operations, by which parallel and streaming multimedia processing is enabled in mobile applications. For low power consumption, fixed-point SIMD datapath is designed with instruction-wise clock gating. The co-processor takes 10.2mm2 in 0.18μm 6-metal standard CMOS logic process and achieves 50Mvertices/s graphics performance with 75.4mW power consumption.
Keywords
CMOS logic circuits; coprocessors; fixed point arithmetic; low-power electronics; multimedia computing; parallel processing; 0.18 micron; 75.4 mW; ARM-10 co-processor; CMOS logic process; advanced 3D graphics algorithms; fixed-point co-processor; instruction-wise clock gating; low power consumption; mobile applications; mobile graphics processor; multimedia co-processor; parallel multimedia processing; programmable SIMD vertex shader; streaming multimedia processing; Buffer storage; Circuits; Coprocessors; Displays; Energy consumption; Fixed-point arithmetic; Graphics; Hardware; Multimedia systems; Streaming media;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2005. ESSCIRC 2005. Proceedings of the 31st European
Print_ISBN
0-7803-9205-1
Type
conf
DOI
10.1109/ESSCIR.2005.1541596
Filename
1541596
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