A sub-10ps resolution current discriminator for timing applications

This paper uses a fully current-mode preamplifier and discriminator to get the accurate timing signal. The current discriminator has different mechanism from a voltage discriminator and hence its time resolution is dependent on both of the bandwidth and circuit gain. Detailed analysis will be present in the paper. The ASIC has been designed and tested with signals with different rise times and amplitudes. The result can verify the analysis that time jitter can be reduced by increasing the circuit gain. 10ps time resolution has been measured for signals with 2.5ns in rise time and only ~20μA above the threshold current.