DocumentCode :
2546986
Title :
A novel circuit topology for generating and validating digitally sense amplifier differentials for bulk and SOI
Author :
Joshi, Rajiv V. ; Chan, Yuen
Author_Institution :
IBM, T. J. Watson Res. Center, Yorktown Heights, NY, USA
fYear :
2005
fDate :
12-16 Sept. 2005
Firstpage :
371
Lastpage :
374
Abstract :
In this paper, a novel programmable voltage divider circuit is proposed for converting digital signals to differential (analog) signals which can be used to evaluate differential sense amplifies in the absence of SRAM cells for the first time. The differentials can be programmable and switchable to reverse polarity. A circuit utilizing this scheme is also proposed to test variety of differential circuits having small signal inputs. The digital input is used to generate analog signals to drive the differential circuits; results are then validated digitally to alleviate more complicated testing problems. The novel circuit technique is implemented in hardware and test results are corroborated with simulations. The circuit functions both in bulk and silicon on insulator (SOI) technologies.
Keywords :
differential amplifiers; digital-analogue conversion; programmable circuits; silicon-on-insulator; voltage dividers; SRAM cells; analog signals; circuit topology; digital signals; digitally sense amplifier; programmable voltage divider circuit; silicon-on-insulator; Circuit testing; Circuit topology; Clocks; Decoding; Differential amplifiers; Hardware; Latches; Random access memory; Silicon on insulator technology; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2005. ESSCIRC 2005. Proceedings of the 31st European
Print_ISBN :
0-7803-9205-1
Type :
conf
DOI :
10.1109/ESSCIR.2005.1541637
Filename :
1541637
Link To Document :
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