A 34 Gbps data transmission system with FPGAs embedded transceivers and QSFP+ modules

Author

Ammendola, Roberto ; Biagioni, Andrea ; Frezza, Ottorino ; Cicero, Francesca Lo ; Lonardo, Alessandro ; Paolucci, Pier ; Rossetti, Davide ; Saiamon, Andrea ; Simula, Francesco ; Tosoratto, Laura ; Vicini, Piero

Author_Institution

INFN Roma Tor Vergata, Rome, Italy

fYear

2012

fDate

Oct. 27 2012-Nov. 3 2012

Firstpage

872

Lastpage

876

Abstract

APEnet+ is our custom developed PCIe gen2 board based on an Altera Stratix IV FPGA. We demonstrate reliable usage of Altera´s embedded transceivers coupled with QSFP+ (Quad Small Form Pluggable) technology. QSFP+ standard defines a hot-pluggable transceiver available in copper or optical cable assemblies for an aggregated bandwidth of up to 40 Gbps. We use embedded transceivers in a 4 lane configuration, each one capable of 8.5 Gbps, for an aggregate bandwidth of 34 Gpbs per link. On Stratix IV 290 we can place up to 6 bidirectional links, together with a PCIe gen2 ×8 hard IP. We describe design and implementation of this data transmission system.

Keywords

data communication; field programmable gate arrays; optical cables; radio transceivers; APEnet+; Altera Stratix IV FPGA; PCIe gen2 board; QSFP+ modules; QSFP+ standard; Stratix IV 290; bidirectional links; bit rate 34 Gbit/s; bit rate 8.5 Gbit/s; copper cable; data transmission system; embedded transceivers; hot-pluggable transceiver; optical cable; quad small form pluggable technology; data acquisition; field programmable gate arrays; high speed interconnect; serial transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2012 IEEE

Conference_Location

Anaheim, CA

ISSN

1082-3654

Print_ISBN

978-1-4673-2028-3

Type

conf

DOI

10.1109/NSSMIC.2012.6551230

Filename

6551230