Title :
A built-in IDDQ testing circuit
Author :
Matakias, S. ; Tsiatouhas, Y. ; Arapoyanni, A. ; Haniotakis, Th ; Prenat, G. ; Mir, S.
Author_Institution :
Dept. of Informatics & Telecommun., Athens Univ., Greece
Abstract :
Although IDDQ testing has become a widely accepted defect detection technique for CMOS ICs, its effectiveness in very deep submicron technologies is threatened by the increased transistor leakage current. In this paper, a built-in IDDQ testing circuit is presented, that aims to extend the viability of IDDQ testing in future technologies and first experimental results are discussed.
Keywords :
built-in self test; failure analysis; integrated circuit testing; leakage currents; CMOS IC; built-in IDDQ testing circuit; deep submicron technologies; defect detection technique; transistor leakage current; CMOS technology; Circuit faults; Circuit testing; Computer science; Fluctuations; Informatics; Switches; Tail; Telecommunication computing; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2005. ESSCIRC 2005. Proceedings of the 31st European
Print_ISBN :
0-7803-9205-1
DOI :
10.1109/ESSCIR.2005.1541662
