A 6-bit low-power compact flash ADC using current-mode threshold logic gates

Author

Akiyama, Shunsuke ; Waho, Takao

Author_Institution

Fac. of Sci. & Technol., Sophia Univ., Tokyo

fYear

2006

fDate

21-24 May 2006

Abstract

A 6-bit low-power compact flash ADC has been designed. MOS current-mode threshold logic gates are employed to obtain a compact encoder circuit block. This reduces the number of transistors in the encoder to one sixth that required in a conventional scheme. A dynamic comparator is also adopted to decrease the power consumption. Circuit simulation assuming a standard 0.35-mum CMOS technology reveals that the present 6-bit ADC operates at 500 MHz with a power consumption as low as 113 mW. The figure of merit, which is defined as the power divided by the product of 2^bit and the sampling frequency, is improved by a factor of two compared with conventional approaches

Keywords

CMOS logic circuits; analogue-digital conversion; comparators (circuits); current-mode circuits; logic design; logic gates; low-power electronics; threshold logic; 0.35 micron; 500 MHz; 6 bit; CMOS technology; MOS logic gates; analogue-digital conversion; circuit simulation; compact encoder circuit block; compact flash ADC; current-mode logic gates; dynamic comparator; low-power flash ADC; threshold logic gates; CMOS logic circuits; CMOS technology; Circuit simulation; Design engineering; Energy consumption; Logic circuits; Logic design; Logic gates; Signal sampling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1693490

Filename

1693490