DocumentCode :
2548913
Title :
Compiler reuse analysis for the mapping of data in FPGAs with RAM blocks
Author :
Baradaran, N. ; Park, Joonseok ; Diniz, Pedro C.
Author_Institution :
Inf. Sci. Inst., Southern California Univ., Marina del Rey, CA, USA
fYear :
2004
fDate :
6-8 Dec. 2004
Firstpage :
145
Lastpage :
152
Abstract :
Contemporary configurable architectures have dedicated internal functional units such as multipliers, high-capacity storage RAM, and even CAM blocks. These RAM blocks allow the implementations to cache data to be reused in the near future, thereby avoiding the latency of external memory accesses. We present a data allocation algorithm that utilizes the RAM blocks in the presence of a limited number of hardware registers. This algorithm, based on a compiler data reuse analysis, determines which data should be cached in the internal RAM blocks and when. The preliminary results, for a set of image/signal processing kernels targeting a Xilinx Virtex™ FPGA device, reveal that despite the increase latency of accessing data in RAM blocks, designs that use them require smaller configurable resources than designs that exclusively use registers, while attaining comparable and in some cases even better performance.
Keywords :
cache storage; content-addressable storage; field programmable gate arrays; memory architecture; program compilers; random-access storage; CAM blocks; Xilinx Virtex FPGA device; cache data reuse; compiler data reuse analysis; compiler reuse analysis; configurable architectures; configurable resources; data allocation algorithm; data mapping; external memory access; hardware registers; high-capacity storage RAM; image processing kernels; internal RAM blocks; internal functional units; multipliers; signal processing kernels; CADCAM; Computer aided manufacturing; Delay; Field programmable gate arrays; Hardware; Random access memory; Read-write memory; Registers; Signal design; Signal processing algorithms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on
Print_ISBN :
0-7803-8651-5
Type :
conf
DOI :
10.1109/FPT.2004.1393262
Filename :
1393262
Link To Document :
بازگشت