DocumentCode
2549069
Title
Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems
Author
Burg, A. ; Haene, S. ; Perels, D. ; Luethi, P. ; Felber, N. ; Fichtner, W.
Author_Institution
Integrated Syst. Lab., ETH, Zurich
fYear
2006
fDate
21-24 May 2006
Abstract
The paper describes an algorithm and a corresponding VLSI architecture for the implementation of linear MMSE detection in packet-based MIMO-OFDM communication systems. The advantages of the presented receiver architecture are low latency, high-throughput, and efficient resource utilization, since the hardware required for the computation of the MMSE estimators is reused for the detection. The algorithm also supports the extraction of soft information for channel decoding
Keywords
MIMO systems; OFDM modulation; VLSI; channel coding; least mean squares methods; packet radio networks; radio receivers; signal detection; MIMO-OFDM systems; VLSI architecture; channel decoding; linear MMSE detection; receiver architecture; resource utilization; soft information; Computer architecture; Decoding; Delay; Hardware; MIMO; OFDM; Signal processing algorithms; Transmitting antennas; Very large scale integration; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1693531
Filename
1693531
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