EM-based analytical model for estimation of worst-case crosstalk noise

With the continued scaling of feature sizes in deep submicron technology, on-chip interconnects have become a dominant factor affecting performance and reliability in high performance integrated circuits (IC). The longer on-chip interconnects coupled with a decrease in wire width and wire separation, inductive effects, and more specifically, mutual inductance coupling between neighbouring wires become non-negligible. An electromagnetic (EM)-based analytical model for the estimation of the noise peak voltage of the victim line under worst-case crosstalk noise effect is presented