DocumentCode
254969
Title
An evaluation of code generation of dataflow languages on manycore architectures
Author
Savas, Suleyman ; Gebrewahid, Essayas ; Ul-Abdin, Zain ; Nordstrom, Tomas ; Mingkun Yang
Author_Institution
Centre for Res. on Embedded Syst., Halmstad Univ., Halmstad, Sweden
fYear
2014
fDate
20-22 Aug. 2014
Firstpage
1
Lastpage
9
Abstract
Today computer architectures are shifting from single core to manycores due to several reasons such as performance demands, power and heat limitations. However, shifting to manycores results in additional complexities, especially with regard to efficient development of applications. Hence there is a need to raise the abstraction level of development techniques for the manycores while exposing the inherent parallelism in the applications. One promising class of programming languages is dataflow languages and in this paper we evaluate and optimize the code generation for one such language, CAL. We have also developed a communication library to support the intercore communication. The code generation can target multiple architectures, but the results presented in this paper is focused on Adapteva´s many core architecture Epiphany. We use the two-dimensional inverse discrete cosine transform (2D-IDCT) as our benchmark and compare our code generation from CAL with a hand-written implementation developed in C. Several optimizations in the code generation as well as in the communication library are described, and we have observed that the most critical optimization is reducing the number of external memory accesses. Combining all optimizations we have been able to reduce the difference in execution time between auto-generated and handwritten implementations from a factor of 4.3× down to a factor of only 1.3×.
Keywords
computer architecture; data flow computing; multiprocessing systems; program compilers; 2D inverse discrete cosine transform; 2D-IDCT; code generation; communication library; computer architectures; dataflow languages; external memory accesses; heat limitations; intercore communication; manycore architectures; programming languages; Generators; Libraries; Multicore processing; Ports (Computers); Program processors; Programming; 2D-IDCT; Actor Machine; Dataflow Languages; Epiphany; Manycore; code generation; evaluation;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded and Real-Time Computing Systems and Applications (RTCSA), 2014 IEEE 20th International Conference on
Conference_Location
Chongqing
Type
conf
DOI
10.1109/RTCSA.2014.6910501
Filename
6910501
Link To Document