Enhanced gm3 cancellation for linearity improvement in CMOS LNAs

Author

Rajashekharaiah, Mallesh ; Upadhyaya, Parag ; Heo, Deukhyoun

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Washington State Univ., Pullman, WA

fYear

2006

fDate

21-24 May 2006

Lastpage

4243

Abstract

An enhanced linearity improvement technique based on the third order intermodulation distortion cancellation or gm3 cancellation technique is presented in this paper. By identifying the issues related to the conventional gm3 cancellation method, the proposed technique is used to design a 0.18mum CMOS LNA using Jazz semiconductor´s BiCMOS process. With an IIP3 of more than +16dBm and gain of more than 15dB, the enhanced linearity LNA or EL2NA with a current consumption of 9mA from a 1.8V supply, provides an efficient way of improving linearity of 5G range direct conversion receivers

Keywords

BiCMOS integrated circuits; CMOS integrated circuits; interference suppression; intermodulation distortion; low noise amplifiers; BiCMOS process; CMOS; EL2NA; direct conversion receiver; enhanced linearity LNA; gm3 cancellation; intermodulation distortion cancellation; linearity improvement; BiCMOS integrated circuits; CMOS process; Computer science; Distortion measurement; Frequency; Intermodulation distortion; Linearity; Noise figure; Transconductance; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1693565

Filename

1693565