FPGA design of HECC coprocessors

Efficient design of suitable public key cryptographic algorithms is one of the most important problems facing their use in communication systems. An emerging public key cryptosystem that promises to be extremely useful for devices built on embedded systems which are resource constrained in memory, space and processing power is that of hyperelliptic curve cryptosystem (HECC). This work outlines an FPGA implementation of a HEC coprocessor which is based on projective and mixed coordinate representations of the curves. A transformation of variables of the curves is also suggested to improve the operating time. Numerical results are provided that shows the improvements offered by these implementations in terms of space and operation time.