DocumentCode
254991
Title
On self-timed ring for consistent mapping and maximum throughput
Author
Weiwen Jiang ; Qingfeng Zhuge ; Juan Yi ; Lei Yang ; Sha, Edwin H. M.
Author_Institution
Coll. of Comput. Sci., Chongqing Univ., Chongqing, China
fYear
2014
fDate
20-22 Aug. 2014
Firstpage
1
Lastpage
9
Abstract
Multiprocessor System-on-Chip employing self-timed technique becomes increasingly attractive due to its ability for exploiting high parallelism of applications. There have been many research efforts on studying self-timed techniques on hardware layer. However, these research results are unable to be applied to system synthesis; in particular, how to correctly and optimally map an application represented by a Data Flow Graph to a self-timed ring architecture remains unknown. Self-timed ring (STR) is a popular and easy to implemented architecture. This paper establishes a series of theorems about the setting of initial configuration to achieve correct mappings and the formulas of calculating corresponding throughputs of STR. Based on the understanding, we can obtain a correct initial configuration of STR. And an algorithm presented in the paper can also find the best initial configuration that achieves the maximum throughput of STR. Examples show maximum throughput algorithm achieves 51.11% improvement of throughput compared with non-optimized ones.
Keywords
data flow graphs; multiprocessing systems; system-on-chip; consistent mapping; data flow graph; maximum throughput; multiprocessor system-on-chip; self-timed ring; system synthesis; Algorithm design and analysis; Computer architecture; Delays; Pipelines; Schedules; Synchronization; Throughput; Consistent Mapping; Self-Timed Ring; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded and Real-Time Computing Systems and Applications (RTCSA), 2014 IEEE 20th International Conference on
Conference_Location
Chongqing
Type
conf
DOI
10.1109/RTCSA.2014.6910511
Filename
6910511
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