DocumentCode
2550087
Title
A flexible formal verification framework for industrial scale validation
Author
Slobodová, Anna ; Davis, Jared ; Swords, Sol ; Hunt, Warren, Jr.
Author_Institution
Centaur Technol., Austin, TX, USA
fYear
2011
fDate
11-13 July 2011
Firstpage
89
Lastpage
97
Abstract
In recent years, leading microprocessor companies have made huge investments to improve the reliability of their products. Besides expanding their validation and CAD tools teams, they have incorporated formal verification methods into their design flows. Formal verification (FV) engineers require extensive training, and FV tools from CAD vendors are expensive. At first glance, it may seem that FV teams are not affordable by smaller companies. We have not found this to be true. This paper describes the formal verification framework we have built on top of publicly-available tools. This framework gives us the flexibility to work on myriad different problems that occur in microprocessor design.
Keywords
CAD; formal verification; integrated circuit design; microprocessor chips; production engineering computing; semiconductor device manufacture; CAD tools; CAD vendors; FV tools; design flows; formal verification framework; industrial scale validation; microprocessor companies; microprocessor design; Boolean functions; Clocks; Companies; Data structures; Hardware design languages; Integrated circuit modeling; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Formal Methods and Models for Codesign (MEMOCODE), 2011 9th IEEE/ACM International Conference on
Conference_Location
Cambridge
Print_ISBN
978-1-4577-0117-7
Electronic_ISBN
978-1-4577-0118-4
Type
conf
DOI
10.1109/MEMCOD.2011.5970515
Filename
5970515
Link To Document