Title :
A 71–76 GHz chip set for wireless communication in 65-nm CMOS technology
Author :
Kuo, Jhe-Jia ; Lin, Wei-Heng ; Kuo, Che-Chun ; Tseng, Jeffrey Ronald ; Tsai, Zuo-Min ; Lin, Kun-You ; Wang, Huei
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
This paper presents a chip set of RF front-end circuits using 65-nm CMOS technology. The chip set includes a LNA, a down-conversion mixer, an up-conversion mixer and a medium power amplifier. The LNA has the 3-dB bandwidth from 68 to 75 GHz with a peak value of 17 dB. The down-conversion mixer has a conversion loss of better than -5 dB from 53 to 73 GHz at 4 dBm LO power. The up-conversion mixer has a conversion loss better than -5 dB from 53 to 75 GHz at 6 dBm LO power. The medium power amplifier delivers 5 dBm P1dB and 6.7 dBm Psat at 71 GHz. These results show the potential of the 65-nm CMOS technology in high frequency circuit design.
Keywords :
CMOS integrated circuits; low noise amplifiers; millimetre wave power amplifiers; mixers (circuits); radiocommunication; CMOS technology; LNA; RF front-end circuit; chip set; down-conversion mixer; frequency 53 GHz to 75 GHz; frequency 68 GHz to 75 GHz; frequency 71 GHz to 76 GHz; medium power amplifier; size 65 nm; up-conversion mixer; wireless communication; CMOS technology; Circuit noise; Circuit synthesis; Gain; Low-noise amplifiers; Noise figure; Power amplifiers; Radio frequency; Radiofrequency amplifiers; Wireless communication; CMOS; low noise amplifier; mixer; power amplifier;
Conference_Titel :
Microwave Symposium Digest, 2009. MTT '09. IEEE MTT-S International
Conference_Location :
Boston, MA
Print_ISBN :
978-1-4244-2803-8
Electronic_ISBN :
0149-645X
DOI :
10.1109/MWSYM.2009.5165664
