Function interface models for hardware compilation

The problem of synthesis of gate-level descriptions of digital circuits from behavioural specifications written in higher-level programming languages (hardware compilation) has been studied for a long time yet a definitive solution has not been forthcoming. The emphasis of the first part of this tutorial is methodological, arguing that one of the major obstacles in the way of hardware compilation becoming a useful and mature technology is the lack of a well defined function interface model, i.e. a canonical way in which functions communicate with arguments. In the second part we present a solution based on the Geometry of Synthesis, a semantics-directed approach to hardware compilation.