Single-chip time-to-digital converter with 10 ps resolution, 160 ns dynamic range, and 1% LSB DNL

We present a low-power Time-to-Digital Converter (TDC) chip, fabricated in a standard cost-effective 0.35 μm CMOS technology, that provides 160 ns dynamic range, 10 ps resolution and Differential Non-Linearity better than 0.01 LSB rms. This chip is the core of a compact TDC module, provided with an USB 2.0 interface for user-friendly control and data-acquisition. The TDC chip consumes just 80 mW and enables the development of power-effective, ultra-compact TDC array chips for multi-channel timing boards. The TDC is suitable for a wide variety of applications such as: Time-of-Flight (TOF) Positron Emission Tomography (PET), picoseconds timings of nuclear events, Fluorescence Lifetime Imaging (FLIM), 3D ranging measurements, time-resolved spectroscopy, Diffuse Optical Tomography (DOT), Optical Time-Domain Reflectometry (OTDR), quantum optics, etc.