An efficient thermal estimation scheme for microprocessors

In recent years, thermal management, which improves the reliability, performance, power leakage, etc. of modern microprocessors, has been the subject of numerous computer architecture and system software studies. To determine the detailed thermal distribution of a microprocessor is among the critical tasks for thermal management. However, because thermal modeling tools require considerable computation time and memory to simulate fine-grain thermal information, they may be unsuitable for dynamic thermal management and hardware implementation. This study proposes a novel model based on reduced resistance-capacitance (RC) networks for efficiently calculating the temperature of a microprocessor. The proposed model is compared with two existing thermal simulation tools, namely, HotSpot [1] and Temptor [2]. The experiment studies show that the results generated using the proposed model differ from those of the existing tools by only 0.5 to 1.5%. However, the suggested model can increase computation speeds by 5 to 9 times and 98 to 161 times that of Temptor and HotSpot, respectively. For the memory usage, the proposed model consumes merely 0.45% of the space used by the existing tools.