Title :
Model-based analysis of timed-triggered ethernet
Author :
Dutertre, Bruno ; Easwaran, Arvind ; Hall, B. ; Steiner, Wilfried
Abstract :
Presents a collection of slides covering the following topics: model-based analysis; time-triggered Ethernet; formal tool; model checking; protocol; design phase; automated test generation; and SAT solver.
Keywords :
computability; formal verification; local area networks; protocols; SAT solver; automated test generation; design phase; formal tool; model checking; model-based analysis; protocol; timed-triggered Ethernet;
Conference_Titel :
Digital Avionics Systems Conference (DASC), 2012 IEEE/AIAA 31st
Conference_Location :
Williamsburg, VA
Print_ISBN :
978-1-4673-1699-6
DOI :
10.1109/DASC.2012.6383129
