DocumentCode
2550431
Title
Memory specification for reconfigurable computing synthesis tools
Author
Xue, John ; Sutton, Peter
Author_Institution
Sch. of Inf. Technol. & Electr. Eng., Queensland Univ., Brisbane, Qld., Australia
fYear
2004
fDate
6-8 Dec. 2004
Firstpage
417
Lastpage
420
Abstract
To assist with the automatic synthesis and optimisation of the memory interface in a reconfigurable system, it is proposed that a memory specification language be developed that caters for a range of common memory architectures and informs a synthesis tool in making decisions on issues such as partitioning and scheduling. Such a modified design flow that allows a synthesis tool to manage the memory interfacing will allow designers to concentrate on higher level design issues. A memory specification language approach differs from other approaches as the interface is not as constrained by a generic interface and more easily provides a wider range of supported memory systems.
Keywords
high level synthesis; memory architecture; reconfigurable architectures; specification languages; automatic synthesis; memory architectures; memory interface optimisation; memory specification language; reconfigurable computing synthesis tools; reconfigurable system; Analytical models; Australia; Information technology; Memory architecture; Memory management; Optimization methods; Process design; Specification languages; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on
Print_ISBN
0-7803-8651-5
Type
conf
DOI
10.1109/FPT.2004.1393314
Filename
1393314
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