Title :
Hardware/software co-simulation environment for CSoC with soft processors
Author :
Mateos, Raúl ; Lázaro, José L. ; Espinosa, Felipe
Author_Institution :
Dept. of Electron., Alcala Univ., Madrid, Spain
Abstract :
Co-simulation is one of the most efficient verification techniques for embedded systems. For the case of FPGAs there are no available tools for CSoCs using soft processors. Only in the case of hard processors the same tools, originally developed for ASIC designs, can be used. This work presents an efficient and modular co-simulation framework for soft processors. Increased efficiency is obtained using a compiled instruction set simulator. Additional co-simulation speed improvement is achieved by tightly coupling the framework to the development environment.
Keywords :
circuit simulation; embedded systems; hardware-software codesign; microprocessor chips; system-on-chip; ASIC designs; CSoC; compiled instruction set simulator; embedded systems; field programmable gate arrays; hard processors; hardware/software co-simulation; modular co-simulation framework; soft processors; system-on-chip; verification techniques; Application software; Application specific integrated circuits; Backplanes; Costs; Design methodology; Embedded software; Embedded system; Field programmable gate arrays; Hardware design languages; Software systems;
Conference_Titel :
Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on
Print_ISBN :
0-7803-8651-5
DOI :
10.1109/FPT.2004.1393321
