A low power 1.1 MHz CMOS continuous-time delta-sigma modulator with active-passive loop filters

Author

Song, Tongyu ; Yan, Shouli

Author_Institution

Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX

fYear

2006

fDate

21-24 May 2006

Abstract

A low power, high bandwidth continuous-time delta-sigma modulator is proposed in this paper. In contrast to traditional continuous-time delta-sigma modulators, this design utilizes passive networks, consisting of only resistors and capacitors, to perform part of the functions of loop filters. Passive networks do not consume power, introduce no distortions. For similar performance, considerable power can be saved. Based on the proposed technique, a 1.1 MHz delta-sigma modulator is designed for 0.25mum CMOS technology. Simulation results show that this modulator can reach 14b performance with only about 15mWpower consumptions

Keywords

CMOS integrated circuits; delta-sigma modulation; integrated circuit design; low-power electronics; passive networks; 0.25 micron; 1.1 MHz; 15 mW; CMOS technology; continuous-time delta-sigma modulator; loop filters; low power delta-sigma modulator; passive networks; Bandwidth; CMOS technology; Capacitors; Delta modulation; Frequency; Passive networks; Quantization; Resistors; Sampling methods; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1693610

Filename

1693610