• DocumentCode
    2551181
  • Title

    Cheap out-of-order execution using delayed issue

  • Author

    Grossman, J.P.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    549
  • Lastpage
    551
  • Abstract
    Out-of-order issue mechanisms increase performance by dynamically rescheduling instructions that cannot be statically reordered by the compiler. Such mechanisms are effective but expensive in terms of both complexity and silicon area. It is therefore desirable to find cost-effective alternatives which can provide similar performance gains. In this paper we present delayed issue, a novel technique which allows instructions to be executed out-of-order without the hardware complexity of dynamic out-of-order issue. Instructions are inserted into per-functional unit delay queues using delays specified by the compiler. Instructions within a queue are issued in order; out of order execution results from different instructions being inserted into the queues at various delays. In addition to improving performance, delayed issue reduces code bloat when loops are pipelined
  • Keywords
    parallel architectures; performance evaluation; compiler; complexity; delayed issue; out-of-order execution; performance; Assembly; Decoding; Delay; Flow graphs; Hardware; Optimizing compilers; Out of order; Parallel architectures; Program processors; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design, 2000. Proceedings. 2000 International Conference on
  • Conference_Location
    Austin, TX
  • ISSN
    1063-6404
  • Print_ISBN
    0-7695-0801-4
  • Type

    conf

  • DOI
    10.1109/ICCD.2000.878338
  • Filename
    878338