1-d cellular automaton for pseudorandom number generation and its reconfigurable hardware implementation

In this paper, a one dimensional (1-d) cellular automaton (CA) for pseudorandom number generation (PRNG) and its reconfigurable hardware implementation are presented. The proposed 1-d CA based on the real time clock sequence (analytical time description) can generate high-quality random numbers which can pass all of the statistical tests of DIEHARD and NIST which seem to be the most powerfully complete general test suites for randomness. After describing our implementation in field-programmable gate array (FPGA), through experiments, we have identified the efficiency of the presented CA that performs exceptionally well compared to most known CA PRNGs reported in literature. More specifically, our CA implementation outperforms all the previous CA and LFSR PRNGs both in hardware implementation and timing characteristics. Such a CA can be efficiently implemented for PRNG reasons in every real time clock application with finally no silicon overhead