Title :
Integrated scheduling and configuration caching in dynamically reconfigurable systems
Author_Institution :
Sch. of Eng. & Comput., Glasgow Caledonian Univ., Glasgow, UK
Abstract :
In order to use the dynamic reconfiguration possibility on FPGAs efficiently, one needs a support in the form of an operating system to manage both software and reconfigurable hardware. For this support, a suitable reconfigurable hardware model and optimization methods are required. This paper considers the problem of executing a dynamically changing set of tasks on a reconfigurable system, made upon a processor and a reconfigurable device. Task execution on such a platform is managed by a scheduler that can allocate tasks either to the processor or to the reconfigurable device. To reduce configuration overhead of modules, a caching algorithm is integrated with the scheduler. Simulation results demonstrate the reduction of configuration overhead up to 40% by using integrated caching algorithm in the scheduler and compare the effectiveness of different caching methods.
Keywords :
cache storage; field programmable gate arrays; operating systems (computers); optimisation; processor scheduling; reconfigurable architectures; task analysis; FPGA; configuration caching; configuration overhead; dynamic reconfiguration possibility; dynamically changing set; dynamically reconfigurable systems; integrated caching algorithm; integrated scheduling; operating system; optimization methods; reconfigurable device; reconfigurable hardware model; task allocation; task execution; Benchmark testing; Field programmable gate arrays; Hardware; Heuristic algorithms; Processor scheduling; Signal processing algorithms; Software;
Conference_Titel :
Intelligent and Advanced Systems (ICIAS), 2010 International Conference on
Conference_Location :
Kuala Lumpur, Malaysia
Print_ISBN :
978-1-4244-6623-8
DOI :
10.1109/ICIAS.2010.5716227