Title :
A low cost approach for detecting, locating, and avoiding interconnect faults in FPGA-based reconfigurable systems
Author :
Das, Debaleena ; Touba, Nur A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Abstract :
An FPGA-based reconfigurable system may contain boards of FPGAs which are reconfigured for different applications and must work correctly. This paper presents a novel approach for rapidly testing the interconnect in the FPGAs each time the system is reconfigured. A low-cost configuration-dependent test method is used to both detect and locate faults in the interconnect. The “original configuration” is modified by only changing the logic function of the CLBs to form “test configurations” that can be used to quickly test the interconnect using the “walking-1” approach. The test procedure is rapid enough to be performed on the fly whenever the system is reconfigured. All stuck-at faults and bridging faults in the interconnect are guaranteed to be detected and located with a short test length. The fault location information can he used to reconfigure the system to avoid the faulty hardware
Keywords :
VLSI; automatic testing; fault diagnosis; field programmable gate arrays; integrated circuit interconnections; logic testing; reconfigurable architectures; FPGA-based reconfigurable systems; bridging faults; configuration-dependent test method; fault location information; interconnect faults; logic function; short test length; stuck-at faults; test configurations; walking-1 approach; Application software; Circuit faults; Circuit testing; Costs; Fault detection; Field programmable gate arrays; Hardware; Integrated circuit interconnections; Logic functions; System testing;
Conference_Titel :
VLSI Design, 1999. Proceedings. Twelfth International Conference On
Conference_Location :
Goa
Print_ISBN :
0-7695-0013-7
DOI :
10.1109/ICVD.1999.745159