DocumentCode :
2552524
Title :
A Modified Loop Filter Design for Digital Symbol Synchronizer
Author :
Yang, Zhixing ; Zhuang, Siliang ; Zhang, Yu
Author_Institution :
Dept. of Electron. Eng., Tsinghua Univ., Beijing, China
fYear :
2010
fDate :
23-25 Sept. 2010
Firstpage :
1
Lastpage :
4
Abstract :
A modified loop filter structure for symbol synchronizer with reduced timing jitter is proposed. A moving average unit (MAU) is added to the traditional proportional-integral (PI) structure to form the modified loop filter. Since the variance of the noise is limited under the average operation, timing jitter is reduced efficiently. Furthermore, the structure is easy for implementation, which requires only one more multiplier, several adders and registers compared to the traditional structure.
Keywords :
channel estimation; jitter; signal detection; digital symbol synchronizer; modified loop filter design; moving average unit; reduced timing jitter; Delay; Filtering theory; Matched filters; Synchronization; Timing jitter; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless Communications Networking and Mobile Computing (WiCOM), 2010 6th International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-3708-5
Electronic_ISBN :
978-1-4244-3709-2
Type :
conf
DOI :
10.1109/WICOM.2010.5600587
Filename :
5600587
Link To Document :
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