Title :
A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm
Author :
Chan, Chi-Hong ; Chan, Cheong-Fat ; Choy, Chiu-Sing ; Pun, Kong-Pang
Author_Institution :
Dept. of Electron. Eng., Chinese Univ. of Hong Kong
Abstract :
This paper presents a current-mode analog-to-quaternary (A/Q) converter using a 0.35mum CMOS process. Redundant signed digit (RSD) technique is used to improve the resolution to 6 digits, which is equivalent to 12 binary bits. Simulations results show that the converter dissipates 382mW at 2.5V supply and 20MHz sampling rate. The converter achieves SNDR of 66.8dB, SFDR of 76.33dB and THD of -75.73dB. The effective number of bit is equal to 5.4 digits or 10.8 bits (binary)
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; current-mode circuits; error correction; redundant number systems; 0.35 micron; 12 bit; 2.5 V; 20 MHz; 382 mW; CMOS current-mode analog-to-quaternary converter; CMOS process; RSD error correction algorithm; redundant signed digit; CMOS technology; Circuit noise; Design engineering; Error correction; Integrated circuit interconnections; Integrated circuit noise; Logic design; Mirrors; Switches; Voltage;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1693697
