Folded-current-steering DAC: an approach to low-voltage high-speed high-resolution D/A converters

Author

Radiom, Soheil ; Sheikholeslam, Behzad ; Aminzadeh, Hamed ; Lotfi, Reza

Author_Institution

Dept. of EE, Ferdowsi Univ., Mashhad

fYear

2006

fDate

21-24 May 2006

Lastpage

4786

Abstract

In this paper, a new topology for CMOS current steering DAC, i.e. folded current-steering structure, suitable for low-voltage applications is presented. Using the folded structure, more voltage headroom is available for the current-source devices increasing the output impedance of the current sources. The DAC linearity is thus improved. Also this novel topology improves the value of PSRR and output voltage swing without SFDR degradation and results in more constant load for current cell. Also a current-steering logic decoder with differential outputs is suggested. Besides, gain boosting is applied to increase the output impedance of current source. These techniques are used to design a 12-bit 200MS/s DAC with 1.5-V power supply and more than 72dB SFDR is achieved in all frequencies. Also Monte-Carlo simulations show that the probability of an SFDR of more than 65dB is more than 90% for an input frequency of 100MHz

Keywords

CMOS integrated circuits; Monte Carlo methods; constant current sources; digital-analogue conversion; low-power electronics; 1.5 V; 12 bit; CMOS current steering DAC; DAC linearity; Monte-Carlo simulations; current-source devices; current-steering logic decoder; folded structure; folded-current-steering DAC; gain boosting; high-resolution D/A converters; output voltage swing; voltage headroom; Boosting; Decoding; Degradation; Frequency; Impedance; Linearity; Logic devices; Power supplies; Topology; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1693700

Filename

1693700