High performance active pixel sensors fabricated in a standard 2.0 μm CMOS technology

This paper reports the development of a CMOS active pixel sensor using a good performance readout circuit. The sensor element is a photodiode implemented with n-well. Using a CMOS process based on the 2μm technology, the sensor was entirely developed in our research center. The parameters used in the CMOS process were SiO₂ thickness of T_ox= 30nm, junction depths (X_Jn and X_Jp) of 0.45μm and gate of n⁺ poly-Si. Under this conditions threshold voltages of Vt_n=0.8V and Vt_p=0.7V were obtained for V_DS=0.1V. Each detector pixel in the array occupies a 130×130μm² area with a fill-factor ∼ 22%, consumed power for pixel ∼ 2mW, dark current density 3μA/cm² in 25°C. Pspice simulated results are in agreement with the experimental measurements in our APS structures under different illumination levels.