DocumentCode :
2553066
Title :
Optimal retiming for initial state computation
Author :
Pan, Peichen ; Chen, Guohua
Author_Institution :
Strategic CAD Labs., Intel Corp., Hillsboro, OR, USA
fYear :
1999
fDate :
7-10 Jan 1999
Firstpage :
366
Lastpage :
371
Abstract :
Retiming is a transformation that optimizes a sequential circuit by relocating the registers. When the circuit has an initial state, one must compute an equivalent initial state for the retimed circuit. In this paper we propose a new efficient retiming algorithm for performance optimization. The retiming determined by the algorithm is the best with respect to initial state computation. It is the easiest retiming for finding an equivalent initial state, and if logic modification is required, it incurs the minimum amount of modification
Keywords :
circuit optimisation; directed graphs; logic CAD; minimisation of switching nets; sequential circuits; state assignment; timing; binary search; directed graph; equivalent initial state; initial state computation; logic modification; optimal retiming; performance optimization; registers relocation; retimed circuit; retiming algorithm; sequential circuit; Delay effects; Design optimization; Inverters; Latches; Logic circuits; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1999. Proceedings. Twelfth International Conference On
Conference_Location :
Goa
ISSN :
1063-9667
Print_ISBN :
0-7695-0013-7
Type :
conf
DOI :
10.1109/ICVD.1999.745183
Filename :
745183
Link To Document :
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