DocumentCode :
2553069
Title :
A reconfigurable FIR filter design using dynamic partial reconfiguration
Author :
Oh, Yeong-Jae ; Lee, Hanho ; Lee, Chong-Ho
Author_Institution :
Sch. of Inf. & Commun. Eng., Inha Univ., Incheon
fYear :
2006
fDate :
21-24 May 2006
Lastpage :
4854
Abstract :
This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient autonomously reconfigurable digital signal processing architecture that is tailored for the realization of arbitrary response FIR filters. The implementation of design addresses area efficiency and flexibility allowing dynamically inserting and/or removing the partial modules. This design method shows the configuration time improvement by small configured slice and good area efficiency as compared to the method of conventional FIR filters
Keywords :
FIR filters; logic design; low-power electronics; reconfigurable architectures; area-efficient digital signal processing; dynamic partial reconfiguration; low-power electronics; reconfigurable FIR filter design; reconfigurable architecture; reconfigurable digital signal processing; Design methodology; Digital filters; Digital signal processing; Fault tolerance; Field programmable gate arrays; Filtering; Finite impulse response filter; Logic arrays; Logic design; Logic devices;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
Type :
conf
DOI :
10.1109/ISCAS.2006.1693717
Filename :
1693717
Link To Document :
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