Title :
On-chip crosstalk noise reduction model using interconnect optimization techniques
Author :
Hunagund, P.V. ; Kalpana, A.B.
Author_Institution :
Dept. of Appl. Electron., Gulbarga Univ., Gulbarga
Abstract :
This paper presents an improved crosstalk 2pi model for noise constrained interconnects optimization. The proposed model has simple closed-form expressions, which is capable of predicting the noise amplitude and the noise pulse width of an RC interconnect as well as coupling locations (near-driver and near-receiver) on victim net. This is efficient and sufficiently accurate to be effectively incorporated in state-of-the-art noise calculators (less than 6% error on average compared with HSPICE simulator). In particularly we demonstrate its effectiveness in the following application: Optimization rule generation for noise reduction using various interconnects optimization techniques.
Keywords :
RC circuits; SPICE; circuit noise; circuit simulation; crosstalk; interconnections; optimisation; HSPICE simulator; RC interconnect; crosstalk 2pi model; near-driver; near-receiver; noise reduction model; on-chip crosstalk; optimization; Analytical models; Capacitance; Closed-form solution; Constraint optimization; Coupling circuits; Crosstalk; Integrated circuit interconnections; Noise level; Noise reduction; Predictive models;
Conference_Titel :
Semiconductor Electronics, 2008. ICSE 2008. IEEE International Conference on
Conference_Location :
Johor Bahru
Print_ISBN :
978-1-4244-3873-0
Electronic_ISBN :
978-1-4244-2561-7
DOI :
10.1109/SMELEC.2008.4770282