Title :
Process simulation of trench gate and plate and trench drain SOI nLDMOS with TCAD tools
Author :
Zhang, H.P. ; Sun, L.L. ; Jiang, L.F. ; Xu, L.Y. ; Lin, M.
Author_Institution :
Sch. of Electron. & Inf., Hangzhou Dianzi Univ., Hangzhou
Abstract :
In this paper process simulation of a novel structural Silicon On Insulator(SOI) LDMOS cell with Trench Gate and Field Plate and Trench Drain (TGFPTD) was done in a sequence of advanced SOI CMOS processes with Silvaco TCAD. The simulated results indicate that the proposed TGFPTD SOI LDMOS cell is feasible to be fabricated in advanced SOI CMOS technologies and the vertical channel length of the vertical gate nMOSFET can be reduced to about 130 nm.
Keywords :
CMOS integrated circuits; MOSFET; semiconductor process modelling; silicon-on-insulator; technology CAD (electronics); SOI CMOS technologies; TCAD; field plate; nMOSFET; structural silicon on insulator LDMOS cell; trench drain; trench gate; CMOS process; CMOS technology; Circuit simulation; Etching; Oxidation; Radio frequency; Resists; Semiconductor films; Silicon on insulator technology; Substrates; CMOS; LDMOS; SOI; TCAD; TGFPTD; process simulation;
Conference_Titel :
Semiconductor Electronics, 2008. ICSE 2008. IEEE International Conference on
Conference_Location :
Johor Bahru
Print_ISBN :
978-1-4244-3873-0
Electronic_ISBN :
978-1-4244-2561-7
DOI :
10.1109/SMELEC.2008.4770283
