DocumentCode
2553443
Title
Design of a 10 GHz Ring Oscillator for PDK verification
Author
Nawi, Illani Mohd ; Kordesch, Albert V.
Author_Institution
EE Eng. Dept., Univ. of Technol. PETRONAS, Tronoh
fYear
2008
fDate
25-27 Nov. 2008
Firstpage
122
Lastpage
125
Abstract
In this work we developed a set of a 10 GHz Ring Oscillators for the purpose of verifying the accuracy of a CMOS foundrypsilas design tools. The project involves front end to back end design, to tapeout. After fabrication of the chip was completed, measurements were performed to test the accuracy of the oscillators. This test chip was used to verify Silterrapsilas PDK (Process Design Kit). Four different oscillator circuits were fabricated. The results show excellent agreement between simulated and measured gate delay.
Keywords
CMOS integrated circuits; integrated circuit design; oscillators; system-on-chip; PDK verification; frequency 10 GHz; gate delay; ring oscillator; test chip; Circuit testing; Design engineering; Fabrication; MOS devices; Performance evaluation; Process design; Ring oscillators; Semiconductor device measurement; Semiconductor device modeling; Synthesizers;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Electronics, 2008. ICSE 2008. IEEE International Conference on
Conference_Location
Johor Bahru
Print_ISBN
978-1-4244-3873-0
Electronic_ISBN
978-1-4244-2561-7
Type
conf
DOI
10.1109/SMELEC.2008.4770290
Filename
4770290
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