• DocumentCode
    255367
  • Title

    Round busbar concept for 30 nH, 1.7 kV, 10 kA IGBT non-destructive short-circuit tester

  • Author

    Smirnova, Liudmila ; Pyrhonen, Juha ; Iannuzzo, F. ; Rui Wu ; Blaabjerg, Frede

  • Author_Institution
    Lappeenranta Univ. of Technol., Lappeenranta, Finland
  • fYear
    2014
  • fDate
    26-28 Aug. 2014
  • Firstpage
    1
  • Lastpage
    9
  • Abstract
    Design of a Non-Destructive Test (NDT) set-up for short-circuit tests of 1.7 kV, 1 kA IGBT modules is discussed in this paper. The test set-up allows achieving short-circuit current up to 10 kA. The important objective during the design of the test set-up is to minimize the parasitic inductance and assure equal current sharing among the parallel connected devices. Achieving of a low inductance level is very challenging due to the current and voltage ratings, the presence of series and parallel protection systems and the required access for a thermal camera. The parasitic extractor Ansys Q3D is used to estimate the parasitic inductances during the design. A new concept of round-shaped, low inductive busbars for an NDT set-up is proposed. Simulation results verified that both reduction of overall inductance and good uniformity in current sharing among parallel devices are achieved by utilizing a circular symmetry. Experimental validation of the simulation was performed using a preliminary set-up. Further, this concept can be implemented in the design of the busbars for the power converters, where the parallel connection of the switching devices is applied to obtain higher current levels.
  • Keywords
    busbars; insulated gate bipolar transistors; nondestructive testing; power semiconductor devices; short-circuit currents; IGBT nondestructive short circuit tester; circular symmetry; current 10 kA; equal current sharing; parasitic inductance; power converters; round busbar concept; voltage 1.7 kV; Cameras; Capacitance; Capacitors; Inductance; Insulated gate bipolar transistors; Schottky diodes; Temperature measurement; Bus bar; Device characterization; Modeling; Power semiconductor device; Reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics and Applications (EPE'14-ECCE Europe), 2014 16th European Conference on
  • Conference_Location
    Lappeenranta
  • Type

    conf

  • DOI
    10.1109/EPE.2014.6910712
  • Filename
    6910712