The impact of 3-dimensional integration on the design of arithmetic units

3-dimensional integration technology stacks multiple die on top of each other with a dense die-to-die interface. This enables a circuit designer to replace long wires with short vertical interconnects, thus reducing wire-related delay and power consumption. In this research, we evaluate the impact of a 3D fabrication technology on the latency and power of arithmetic functional units. Specifically, we study integer adders and shifters as they have very different delay characteristics. An adder´s critical path latency is dominated by logic/gate delays, while a shifter´s latency is more greatly affected by wire delay. We demonstrate that the potential benefits of a 3D technology are the greatest when applied to wire-bound circuits. In particular, a barrel shifter implemented in 3D exhibits a 9% reduction in latency with a simultaneous 8% reduction in energy