Title :
Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications
Author :
Ker, Ming-Dou ; Wu, Chien-Hua
Author_Institution :
Nanoelectron. & Gigascale Syst. Lab., Nat. Chiao-Tung Univ., Hsin-Chu
Abstract :
A LVDS receiver with new data recovery design for flat-panel-display (FPD) link is presented. The new delay-selecting technique is used in LVDS receiver to reduce the circuit complexity and to save chip power for cost-efficient applications. The proposed LVDS receiver with an operation data rate of 1.25 Gb/s has been successfully verified in a 0.13-mum CMOS process, which can fully support the operation of FPD link with UXGA resolution
Keywords :
CMOS integrated circuits; flat panel displays; television receivers; 0.13 micron; 1.25 Gbit/s; CMOS process; LVDS receiver; UXGA flat panel display; circuit complexity; delay-selecting technique; low-voltage differential signaling; Circuits; Clocks; Data communication; Delay; Flat panel displays; Laboratories; Nanoelectronics; Phase locked loops; Sampling methods; Voltage-controlled oscillators;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1693793
