DocumentCode
2554859
Title
An eye detection technique for clock and data recovery applications
Author
Zhuang, Jingcheng ; Du, Qingjin ; Kwasniewski, Tad
Author_Institution
Dept. of Electron., Carleton Univ., Ottawa, Ont.
fYear
2006
fDate
21-24 May 2006
Lastpage
5162
Abstract
An eye detection technique to detect maximum vertical eye opening points for data recovery circuit (CDR) applications and the circuit implementation of an eye detector (ED) are reported in this paper. The ED samples the incoming data to generate the retimed data and produces an error signal indicating whether the sampling point leads or lags the maximum eye opening point, where the lowest BER is expected. The ED is implemented in CMOS 0.18mum technology, and its feasibility is confirmed by transistor-level simulations
Keywords
CMOS integrated circuits; clocks; detector circuits; error statistics; synchronisation; 0.18 micron; CMOS technology; bit error rate; clock recovery; data recovery circuit; eye detection; Bit error rate; CMOS technology; Circuits; Clocks; Data mining; Detectors; Sampling methods; Signal analysis; Threshold voltage; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1693794
Filename
1693794
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