Title :
3 mW V-band divide-by-2 and W-band divide-by-4 wide locking range frequency dividers in 90-nm CMOS
Author :
Chen, Chung-Chun ; Huei Wang ; Tsao, Hen-Wai ; Wang, Chi-Hsueh
Author_Institution :
Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
The proposed divide-by-2 (D2) and divide-by-4 (D4) frequency dividers (FDs) achieve the widest locking range reported to date by using a dual-mixing technique in 90-nm CMOS. At an input power of 0 dBm, the D2 FD demonstrates a locking range of 51-74 GHz, and the D4 FD one of 82.5-90 GHz, without any tuning mechanism. The power consumption is only 3 mW for both the D2 FD and the D4 FD, from a 0.5 V supply.
Keywords :
CMOS integrated circuits; frequency dividers; CMOS; V-band divide-by-2 wide locking range frequency dividers; W-band divide-by-4 wide locking range frequency dividers; dual-mixing technique; frequency 51 GHz to 74 GHz; frequency 82.5 GHz to 90 GHz; size 90 nm; voltage 0.5 V; Band pass filters; CMOS technology; Circuit simulation; Energy consumption; Frequency conversion; Parasitic capacitance; Phase locked loops; Tuning; Voltage-controlled oscillators; Wideband; CMOS; dual-mixing; frequency divider (FD); phase-locked loop (PLL); voltage-controlled oscillator (VCO);
Conference_Titel :
Microwave Symposium Digest, 2009. MTT '09. IEEE MTT-S International
Conference_Location :
Boston, MA
Print_ISBN :
978-1-4244-2803-8
Electronic_ISBN :
0149-645X
DOI :
10.1109/MWSYM.2009.5165890
