DocumentCode :
2555617
Title :
Low power scheduling method using multiple supply voltages
Author :
Tsai, Kun-Lin ; Lee, Ju-Yueh ; Ruan, Shanq-Jang ; Feipei Lai
Author_Institution :
Dept. of Electr. Eng., National Taiwan Univ., Taipei
fYear :
2006
fDate :
21-24 May 2006
Abstract :
In this paper, we propose a method to solve the multiple supply voltage scheduling problem which is to assign the operational nodes of a control/data flow graph to a voltage level to minimize the average power consumption within a given computation time. Different from the previous researches focused on the operational nodes in the critical path and utilized the slack time to change the voltage of other nodes, our method can deal with all nodes without considering whether the node is in the critical path or not, and the benefit is that the voltage assignment of each node becomes more flexible. The proposed method consists of two phases, the scheduling phase and the adjusting phase, and considers both the power (delay) of the computational components and the power (delay) of the level shifters. Experimental result shows that using three voltages on a number of standard benchmarks, an average power saving of 34.23% can be obtained if the delay overhead is set as 0, and 48.07% can be obtained if the total delay is set as 1.6 times of the original delay
Keywords :
data flow graphs; low-power electronics; power supply circuits; scheduling; adjusting phase; control graph; data flow graph; level shifters; multiple supply voltage scheduling; power comsumption; scheduling phase; Circuits; Delay; Energy consumption; Flow graphs; High level synthesis; Power dissipation; Power system reliability; Processor scheduling; Scheduling algorithm; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
Type :
conf
DOI :
10.1109/ISCAS.2006.1693828
Filename :
1693828
Link To Document :
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