DocumentCode :
2556119
Title :
High-pass /spl Delta//spl Sigma/ modulator: from system analysis to circuit design
Author :
Nguyen, Van Tam ; Loumeau, Patrick ; Naviner, Jean-Francois
Author_Institution :
Departement Commun. et electronique, Telecom Paris
fYear :
2006
fDate :
21-24 May 2006
Lastpage :
5382
Abstract :
This paper describes a successful switched-capacitor implementation in CMOS process of a high-pass DeltaSigma modulator that is completely immune to low frequency noise. This is a second-order modulator which achieves a 59dB dynamic range with a 32 times oversampling ratio at 10 MHz sampling frequency. The relationship between the performance and the stability of the modulator and its circuit parameters was determined through a set of behavioral models. Efficient multilevel abstraction models were developed. They reduce simulation time and allow us to determine a possible range of circuit specifications with reasonable design margins with a view to circuit implementation. The modulator was implemented in a 0.35mum 3.3V CMOS process. Measurement shows that this modulator is completely immune to low frequency noise
Keywords :
CMOS integrated circuits; delta-sigma modulation; high-pass filters; switched capacitor filters; 0.35 micron; 10 MHz; 3.3 V; CMOS process; high-pass DeltaSigma modulator; second-order modulator; switched-capacitor circuits; CMOS process; Circuit analysis; Circuit stability; Circuit synthesis; Delta modulation; Dynamic range; Frequency; Low-frequency noise; Sampling methods; Semiconductor device modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
Type :
conf
DOI :
10.1109/ISCAS.2006.1693849
Filename :
1693849
Link To Document :
بازگشت