Title :
A low-distortion fourth-order bandpass delta-sigma modulator
Author :
Huang, Shu-Chuan ; Liao, Min-Hsiung ; Hsu, Chih-Sheng
Author_Institution :
Dept. of Electr. Eng., Tatung Univ., Taipei
Abstract :
In this paper, a low-distortion fourth-order bandpass DeltaSigma modulator is proposed. The architecture of the modulator is based on the low-distortion DeltaSigma modulator. The analysis of the modulator due to the nonideal effect of the opamp and the capacitor mismatch is given, and the system-level simulation is provided to compare the performance to that of the traditional architecture. The modulator is implemented with a 0.35mum CMOS process. A double-sampled technique is employed to relax the speed requirement of the opamp. The measured SNR (-3dBFS) is 47.8dB for a center frequency of 5 MHz and the signal bandwidth of 200 kHz at a clock frequency of 10 MHz (equivalent sampling frequency of 20 MHz)
Keywords :
CMOS integrated circuits; capacitors; delta-sigma modulation; operational amplifiers; 0.35 micron; 10 MHz; 20 MHz; 200 kHz; 5 MHz; CMOS process; bandpass delta-sigma modulator; capacitor mismatch; double sampled technique; nonideal effect; opamp; system level simulation; traditional architecture; Analytical models; CMOS process; Capacitors; Delay; Delta modulation; Frequency; Nonlinear distortion; Performance analysis; Topology; Transfer functions;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1693850
