A high-speed technique for time-interleaving continuous-time delta-sigma modulators

A technique for increasing the speed of time-interleaved continuous-time ΔΣ modulators is presented. Extra feedback paths allow the DAC pulse to enter the adjacent clock period without deteriorating the SNR of the ΔΣ modulator. With the added feedback paths, an extra summer needs to be added to the modulator to attain an equivalent impulse response, but the critical path of the modulator is able to operate twice as fast. Also, with the inclusion of non-idealities such as finite gain and finite bandwidth opamps and DAC clock jitter, the modulator is able to attain a higher SNR with the new technique.