DocumentCode :
2558178
Title :
Design Options for High Efficiency Linear Handset Power Amplifiers
Author :
Asbeck, P. ; Larson, L. ; Kimball, D. ; Pornpromlikit, S. ; Jeong, J.-H. ; Presti, C. ; Hung, T.P. ; Wang, F. ; Zhao, Y.
Author_Institution :
Univ. of California at San Diego, La Jolla, CA
fYear :
2009
fDate :
19-21 Jan. 2009
Firstpage :
1
Lastpage :
4
Abstract :
Design techniques for handset power amplifiers are discussed, with emphasis on high efficiency architectures and CMOS technology. Experimental results with prototype circuits including Doherty, envelope tracking, outphasing and digital polar modulation are presented. Future design challenges are also highlighted.
Keywords :
CMOS integrated circuits; power amplifiers; CMOS technology; digital polar modulation; envelope tracking; high efficiency linear handset power amplifiers; CMOS technology; High power amplifiers; Integrated circuit technology; Power amplifiers; Radio frequency; Radiofrequency amplifiers; Stacking; Telephone sets; Transformers; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems, 2009. SiRF '09. IEEE Topical Meeting on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4244-3940-9
Electronic_ISBN :
978-1-4244-2831-1
Type :
conf
DOI :
10.1109/SMIC.2009.4770542
Filename :
4770542
Link To Document :
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