Unified compact modeling for Bulk/SOI/FinFET/SiNW MOSFETs

Author

Zhou, Xing ; Zhu, Guojun ; See, Guan Huei ; Zhang, Junbin ; Lin, Shihuan ; Wei, Chengqing ; Chen, Zuhui ; Srikanth, Machavolu ; Yan, Yafei ; Selvakumar, Ramachandran ; Chandra, William

Author_Institution

Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore

fYear

2009

fDate

1-2 June 2009

Firstpage

1

Lastpage

6

Abstract

This paper describes seamless transitions among various MOS devices, ranging from bulk and partially/fully-depleted SOI to double-gate FinFETs and silicon-nanowire MOSFETs. The underlying governing equations for various structures are outlined, which provide the motivation for unifying MOS compact models with the unified regional modeling (URM) approach.

Keywords

MOSFET; semiconductor device models; silicon-on-insulator; Bulk MOSFET; FinFET MOSFET; MOS compact model; MOS devices; SOI MOSFET; SiNW MOSFET; silicon-nanowire MOSFET; unified compact modeling; unified regional modeling; Doping; Electrostatics; FinFETs; Integral equations; MOS devices; MOSFETs; Poisson equations; Semiconductor process modeling; Silicon on insulator technology; Voltage; FinFET; MOSFET; SOI; compact model; double gate; gate-all-around; silicon nanowire; surface potential; unified regional modeling;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Semiconductor Technology, 2009. IEDST '09. 2nd International Workshop on

Conference_Location

Mumbai

Print_ISBN

978-1-4244-3831-0

Electronic_ISBN

978-1-4244-3832-7

Type

conf

DOI

10.1109/EDST.2009.5166097

Filename

5166097