DocumentCode :
2559223
Title :
Recent advances in charge trap flash memories
Author :
Sandhya, C. ; Singh, P.K. ; Gupta, S. ; Rohra, H. ; Shivatheja, M. ; Ganguly, U. ; Hofmann, R. ; Mukhopadhyay, G. ; Mahapatra, S. ; Vasi, J.
Author_Institution :
Centre for Excellence in Nanoelectron., Indian Inst. of Technol. Bombay, Mumbai, India
fYear :
2009
fDate :
1-2 June 2009
Firstpage :
1
Lastpage :
5
Abstract :
This paper reviews recent advances in Charge Trap Flash (CTF) memories. CTFs are predicted to replace the traditional floating-gate flash devices beyond the 32 nm node. The paper focuses on work done at IIT Bombay in the areas of both nitride-based SONOS devices as well as nanocrystal (NC)-based devices. For SONOS devices, results are presented for optimization of the nitride layer to obtain the best characteristics, and the simulation of the program/erase transients. For NC devices, experimental characteristics of single and dual layer cells, as well as simulation results are presented.
Keywords :
flash memories; nanostructured materials; SONOS devices; charge trap flash memories; floating-gate flash devices; nanocrystal-based devices; Electron traps; Flash memory; Flash memory cells; High-K gate dielectrics; Nanocrystals; Nonvolatile memory; Read only memory; SONOS devices; Silicon; Tunneling; Charge Trap Flash; Nanocrystal; SONOS;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Semiconductor Technology, 2009. IEDST '09. 2nd International Workshop on
Conference_Location :
Mumbai
Print_ISBN :
978-1-4244-3831-0
Electronic_ISBN :
978-1-4244-3832-7
Type :
conf
DOI :
10.1109/EDST.2009.5166101
Filename :
5166101
Link To Document :
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