A 10-Gb/s optical receiver front-end with 5-mW transimpedance amplifier

This paper describes the design and performance of a 10-Gb/s optical receiver front-end fabricated in a 0.13-μm CMOS technology. To realize a wide bandwidth transimpedance amplifier (TIA) that has large input parasitic capacitance, an area-efficient stacked spiral transformer is implemented. By using a capacitance multiplication technique, the baseline wander resulting from a current offset cancellation is minimized. The TIA achieves a transimpedance gain of 58.5dBΩ, an area of 0.02mm², and a bandwidth of 7.9GHz. The limiting amplifiers (LAs) following the TIA use negative impedance converters to enhance the bandwidth. The TIA and the LAs consume 5mW and 28.4mW, respectively with a supply voltage of 1.2V.