DocumentCode :
2559597
Title :
Heuristic techniques for the synthesis of complex functional units
Author :
Geurts, Werner ; Catthoor, Francky ; De Man, Hugo
Author_Institution :
IMEC, Leuven, Belgium
fYear :
1993
fDate :
22-25 Feb 1993
Firstpage :
552
Lastpage :
556
Abstract :
A technique for the synthesis of complex multifunctional units is presented. Given a set of functions, the goal is to minimize the area cost of the functional unit that can execute these functions. The approach is based on heuristic algorithms which make use of bipartite matching combined with an efficient ordering strategy. The experimental results show that a good tradeoff between CPU time and the quality of the design has been obtained
Keywords :
application specific integrated circuits; data flow graphs; high level synthesis; ASU synthesis; CAD algorithms; bipartite matching; complex functional units; efficient ordering strategy; heuristic algorithms; hierarchical clustering; high level synthesis; multifunctional units; Clocks; Computer architecture; Cost function; Delay; Filters; Libraries; Merging; Pipelines; Resource management; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
Conference_Location :
Paris
Print_ISBN :
0-8186-3410-3
Type :
conf
DOI :
10.1109/EDAC.1993.386417
Filename :
386417
Link To Document :
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